Most of the memory operations include voltage level shifting features (e.g., word line driver and bit line driver). Therefore, most of non-volatile memory devices, such as flash memory, EEPROM) include high voltage level shifters configured receive an input signal at a first voltage and provide an output signal at a higher voltage (about 10 V to 16 V). The higher voltage may be from an analog pumping block during a write operation. Because the threshold voltage Vt of high voltage N-channel metal-oxide semiconductor (NMOS) transistors and high voltage P-channel metal-oxide semiconductor (PMOS) transistors is about 0.8 V, or close to 1.0 V under worst conditions, high-voltage level shifters cannot operate with a very low-power supply voltage (approximately 1 V). FIG. 1 is a circuit diagram of a conventional 4-transistor high-voltage level shifter 100, which includes two high-voltage NMOS transistors and two high-voltage PMOS transistors. When the input IN is at 0 V, a node denoted “node” is set to 1.35 V to 1.65 V, and the output OUT is at the voltage VHH. When the input IN changes from 0 V to 1.35-1.65 V, the output OUT is at 0 V. The NMOS and PMOS transistors are high voltage transistors.
FIG. 2 is a circuit diagram of a conventional 6-transistor high-voltage level shift circuit. Two more NMOS transistors are added to limit the maximum voltage seen by any gate oxide in the circuit. This technique is referred to as cascading. Thus, the number of the NMOS and PMOS transistors depends from the high-voltage transfer capability. In particularly, in the case of discharge, the threshold voltage Vt of a high-voltage NMOS (referred to as HVNMOS hereinafter) transistor has a close relationship with the discharge voltage. For example, in low power supply applications (e.g., 1.2 V), the higher the threshold voltage Vt of the HVNMOS transistor, the slower the discharge rate.
As semiconductor processes continue to be scaled down, the supply voltage also has to be reduced to accommodate the thin oxide layer of MOS transistors. Conventional high voltage level shifters can operate at a supply voltage of 1.2 V, but cannot operate in ultra-low power supply voltage applications (e.g., lower than 1 V).
Thus, there is a need to provide a novel voltage level shifter to overcome the drawbacks of the prior art.